The invention relates to a transconductance circuit comprising
a first and a second transistor of a first conductivity type having their bases coupled to input terminals for receiving an input signal and having their emitters connected to a common point by means of a first resistor, which common point is coupled to a first power-supply terminal by means of a current source, and
a third transistor of the first conductivity type whose collector-emitter path is arranged between a second power-supply terminal and the common point and having its base coupled to a tap of a voltage divider comprising two substantially identical second resistors arranged between the bases of the first and the second transistor.
Such a circuit arrangement is generally suitable for use in integrated circuits and is particularly suitable for those uses where a comparatively large input voltage range is required.
Such an arrangement is known from European Patent Application 0,157,447 and corresponding U.S. Pat. No. 4,612,513. In the absence of an input voltage most of the current from the current source flows through the third transistor, so that only a small current will flow through the first resistors and the first and the second transistor. When the input voltage increases the current through the third transistor decreases and the current through either the first or second transistor increases until the entire current from the current source flows through this transistor. As a result of the small quiescent current through the first resistors and the first and the second transistor this circuit has a very low input offset voltage. Moreover, since the current through the first and the second transistor increases as the input voltage increases the circuit has a substantial slew rate.
However, a drawback of this circuit is that it exhibits a comparatively large non-linearity, which is caused by the fact that for low input voltages the transconductance of the circuit is substantially twice as high as that for high input voltages. Indeed, for low input voltages both the first and the second transistor contribute to the signal output current, whereas for high input voltages only one of the transistors contributes to this current.